000 01131nam a22002537a 4500
003 OSt
005 20251001180851.0
008 240403b ||||| |||| 00| 0 eng d
040 _c0
082 _aDPer 621.317 Ie21 October 2022 v. 37 n. 10
100 _aLi, Zhenchao.
_eauthor.
_955841
245 _aA second-harmonic suppression method based on differentiated-capacitance design for input-parallel output-series DAB fed single-phase VSI /
_cZhenchao Li, Yan Zhang, Jinjun Liu, Ziyin Wang, Yuwei Wu, Ning Li, and Junmin Si.
260 _aNew York ;
_bThe Institute of Electrical and Electronics Engineers, Inc. ,
_cOctober 2022.
300 _aVolume 37, pages 11592-11606 :
_billustration ;
_c29 cm.
500 _aIEEE Transactions on Power Electronics, v. 37, n. 10, pages 11592-11606, October 2022.
700 _aLi, Zhenchao.
_eauthor.
_955841
700 _aZhang, Yan.
_eauthor.
_955842
700 _aLiu, Jinjun.
_eauthor.
_955843
700 _aWang, Ziyin.
_eauthor.
_955844
700 _aWu, Yuwei.
_eauthor.
_955845
700 _aLi, Ning.
_eauthor.
_955846
700 _aSi, Junmin.
_eauthor.
_955847
942 _2ddc
_cPER
999 _c19969
_d19969