| 000 | 00619nam a22001817a 4500 | ||
|---|---|---|---|
| 999 |
_c19069 _d19069 |
||
| 008 | 240212b ||||| |||| 00| 0 eng d | ||
| 020 | _a9781138099951 | ||
| 082 |
_22018 _aDC 621.381 _bC314 |
||
| 100 |
_aCavanagh, Joseph. _952137 |
||
| 245 |
_aVerilog HDL design examples / _cJoseph Cavanagh. |
||
| 260 |
_aNew York : _bCRC Press, _c©2018. |
||
| 300 |
_axv, 655 pages : _billustrations ; _c26 cm. |
||
| 500 | _aIncludes index. | ||
| 650 |
_aDigital electronics _xComputer-aided design. _952429 |
||
| 650 |
_aLogic design. _952430 |
||
| 650 |
_aVerilog (Computer hardware description language) _952431 |
||
| 942 |
_2ddc _cDC |
||